美國Bittware DSP產品線

 

DSP硬體產品線

S4 Family: Stratix IV GX FPGA

S4-AMC
Altera® Stratix® IV GX Reconfigurable AMC

GX Family: Stratix II GX FPGA

GX-AMC
Altera Stratix II GX AdvancedMC

SF/GX-AMC
Altera® Stratix® II GX AdvancedMC with four SFP/SFP+

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GT Family: Hybrid Stratix II GX and TigerSHARC

GT-3U-cPCI
Ruggedized Hybrid Signal Processing 3U CompactPCI Board

GT-6U-VME
Ruggedizable Hybrid Signal Processing 6U VME/VXS (VITA 41) Board

GT-3U-VPX
Ruggedizable Hybrid Signal Processing 3U VPX Board

 

B2 Family: Hybrid Stratix II and TigerSHARC AMC

B2-AMC
Hybrid Signal Processing Advanced Mezzanine Card

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T2 Family: ADSP-TS201 TigerSHARC DSP

Danube 6-PaC PCI
Six ADSP-TS201 TigerSHARC PCI Board

Note: Legacy product; not intended for new design-ins.

T2-PCI
Quad ADSP-TS201 TigerSHARC PCI-X Board

T2-6U-cPCI
Octal ADSP-TS201 TigerSHARC 6U cPCI board

T2-PMC
Quad ADSP-TS201S TigerSHARC PMC Board

T2-6U-VME
Octal ADSP-TS201 TigerSHARC 6U VME board

Tiger Family: ADSP-TS101 TigerSHARC DSP

Tiger-PCI
Quad ADSP-TS101 TigerSHARC PCI board

Note: Legacy product; not intended for new design-ins. BittWare's T2 or GT Families should be used instead.

Tiger-6U-cPCI
Octal ADSP-TS101S TigerSHARC 6U cPCI board

Tiger-PMC
Quad ADPS-TS101 TigerSHARC PMC board

Note: Legacy product; not intended for new design-ins. BittWare's T2 or GT Families should be used instead.

Hammerhead Family: ADSP-21160 SHARC DSP

Hammerhead-PCI
Quad ADSP-21160 PCI board

Note: Legacy product; not intended for new design-ins. BittWare's T2 or GT Families should be used instead.

Hammerhead-3U-cPCI
Quad ADSP-21160 3U cPCI board

Note: Legacy product; not intended for new design-ins. BittWare's T2 or GT Families should be used instead.

Hammerhead-6U-cPCI
Octal ADSP-21160 SHARC 6U cPCI board .

Note: Legacy product; not intended for new design-ins. BittWare's T2 or GT Families should be used instead.

Hammerhead-PC/104-Plus
Quad ADSP-21160 PC/104-Plus board

Note: Legacy product; not intended for new design-ins. BittWare's T2 or GT Families should be used instead.

Hammerhead-PMC
Quad ADSP-21160 PMC board

Note: Legacy product; not intended for new design-ins. BittWare's T2 or GT Families should be used instead.

I/O Cards

Reef-PMC+
Reconfigurable FPGA card with ADSP-21160

Remora-PMC+
Reconfigurable Virtex-II PCI Mezzanine Card

Barracuda-PMC+
High speed A/D card with reconfigurable FPGA , 64/66 PCIk and SHARC® Link Ports

Remora-BMC+
Reconfigurable Virtex-II BittWare Mezzanine Card

Tetra-PMC+
High-Speed A/D I/O Card with Reconfigurable FPGA and TigerSHARC Link Ports

 

SharcFIN Family: PCI-DSP Bridge Chips

SFIN-160
PCI-DSP bridge chip for ADSP-21160

Note: Legacy product; not intended for new design-ins

SFIN-161
PCI-DSP bridge chip for ADSP-21161

Note: Legacy product; not intended for new design-ins

SFIN-101
PCI-DSP bridge chip for ADSP-TS101

Note: Legacy product; not intended for new design-ins

SFIN-201
PCI-DSP bridge chip for ADSP-TS201

Note: Legacy product; not intended for new design-ins

ATLANTiS™ Framework

Embedded signal processing applications increasingly require flexibility, adaptability, and reprogrammability. The ability to modify a system in the real world is crucial for many systems. When this is coupled with the requirements of floating-point signal processing - low latency, high throughput, extended precision and dynamic range - the ability to properly satisfy all requirements using one processing technology diminishes. A design that includes both FPGAs and DSPs - a hybrid architecture - provides the best solution. But FPGAs are not processors, and therefore do not have an internal architecture, an instruction set, data paths, or a peripheral set. FPGAs, by definition, simply provide the raw materials and components that allow – and require – a user to create everything from scratch. If a user must create their own DMA/Memory interface or host/control interface for the FPGA in addition to proprietary algorithmic development, this defeats the basic purpose of COTS – to reduce development costs, risks, and time-to-deployment.

To successfully include FPGAs as part of the signal processing chain, board architectures must also include an FPGA framework: ATLANTiS™. ATLANTiS provides fully validated board-level interfaces for I/O, communications, and memory; an internal dataflow interconnect fabric that allows the ATLANTiS modules to be easily connected; and a control fabric that allows them to be easily coordinated and controlled. This framework creates a stable, high performance signal processing platform that frees the designer to focus on application development rather than reinventing board-level infrastructure.

ATLANTiS™ Features

  • Supports low-level board interfacing
  • Allows the user to focus on proprietary algorithm development
  • Supports dynamic connections between any on-board and off-board I/Os
  • Communications can be point-to-point or broadcast to various outputs
  • Provides communication between the TigerSHARC link ports and all other I/Os connected to the FPGA/board
  • Off-board I/O is defined by board architecture
  • Devices' connections can be reconfigured as requirements dictate without recompiling or changing cables
  • Standard and custom developed IP blocks are available

ATLANTiS™ Overview

BittWare's ATLANTiS framework is an I/O switching and processing device implemented in the on-board FPGA. ATLANTiS facilitates off-board I/O and provides communications routing and processing, allowing system designers to setup and dynamically change connections as their specific applications require. All inputs and outputs are routed through ATLANTiS, supporting a throughput of greater than 5 GB/sec per DSP cluster. By tightly integrating DSPs, PCI bridge, PMC interface, and I/O peripherals with the on-board FPGA, ATLANTiS gives designers nearly infinite options for configuring and routing the I/O, greatly increasing the performance and flexibility of multi-processor, multi-board applications.

SharcFIN PCI-DSP Bridge

Note: SharcFIN products are legacy products and are not intended for new design-ins.

BittWare's SharcFIN PCI-DSP bridge chips are designed specifically to interface with Analog Devices' SHARC and TigerSHARC DSPs. The SharcFINs are complete, single-chip solutions that interface the DSPs with PCI and various board-level utilities, providing the groundwork for designers to quickly implement their DSP system designs.

The SharcFIN PCI-DSP bridge chips are designed into BittWare's Hammerhead (ADSP-2116x), Tiger (ADSP-TS101S), and T2 (ADSP-TS201S) board families.

SharcFIN DSP-PCI Chip Overviews

SFIN-201

The SFIN-201 SharcFIN features a set of bus interfaces and peripherals for the ADSP-TS201S TigerSHARC DSPs. It integrates a full 64-bit, 66 MHz master PCI interface, I2C interfaces, a peripheral bus that interfaces the DSPs to peripherals such as Flash memory, and an extensive flag and interrupt multiplexer. The SFIN-201 ships with BittWare's ADSP-TS201 T2 family of DSP boards.

View addtional chip details >
 

SFIN-101

The SFIN-101 SharcFIN features a set of bus interfaces and peripherals for the ADSP-TS101S TigerSHARC DSPs. It integrates a full 64-bit, 66 MHz master PCI interface, I2C interfaces, a peripheral bus that interfaces the DSPs to peripherals such as Flash memory, and an extensive flag and interrupt multiplexer. The SFIN-101 ships with BittWare's ADSP-TS101 Tiger family of DSP boards.

View addtional chip details >
 

SFIN-161

The SFIN-161 SharcFIN features a set of bus interfaces and peripherals for the ADSP-21161 SHARC DSPs. it integrates a full 32-bit, 33 MHz master PCI interface, an SBSRAM controller, two I2C interfaces, eight general purpose I/O pins, and expansion bus support. The SFIN-161 ships with BittWare's' ADSP-21161 Hammerhead family of DSP boards

View addtional chip details >

SFIN-160

The SFIN-160 SharcFIN features a set of bus interfaces and peripherals for the ADSP-21160 SHARC DSPs. It integrates a full-featured SDRAM controller, a full 64-bit, 66 MHz master PCI interface, a peripheral bus that interfaces the DSPs to peripherals such as Flash memory, and an extensive flag and interrupt multiplexer. The SFIN-160 ships with BittWare's ADSP-21160 Hammerhead family of DSP boards.

View addtional chip details >

FINe™ Control Bridge

BittWare's FINe™ is a control plane and GigE interface/bridge supporting a variety of processing units including ADI TigerSHARC DSPs and Altera's FPGAs.

The BittWare FINe™ control bridge gives the processing unit low-overhead access to the host via a 32-bit, 66 MHz PCI interface. The FINe also provides a general purpose peripheral bus that allows the processing unit to access on-board perhipherals such as Flash, 10/100 ethernet, and RS232/RS422 UART interfaces

SFIN-160

PCI-DSP bridge chip for ADSP-21160

Note: SharcFIN products are legacy products and are not intended for new design-ins.

Features
  • 64/66MHz PCI rev.2.2 compliant interface
  • Interface to ADSP-21160 processor bus
  • General-purpose expansion bus (peripheral bus)
    • 8 bits wide @ 20 MHz
    • Accessible from 21160 bus and PCI bus
    • Flash interface for SHARC boot and nonvolatile data storage
  • 4 independent DMA controllers (with support for chaining)
    • 2 Transmit
    • 2 Receive
  • 6 independent FIFOs (2.4 KB total):
    • 4 DMA buffers, 64x64 each (2 Transmit; 2 Receive)
    • 2 target buffers, 32x64 write, 16x64 read
  • Direct, single PCI access from SHARC bus
  • 16-Byte Configurable PCI Mailbox registers
  • I2O™ V1.5 compliant
  • Programmable interrupt multiplexer: 10 inputs, 7 outputs (1 of each dedicated to PCI)
  • SDRAM controller on 21160 bus; supports up to 512 MB
  • Standard I2C interface
Overview

The SFIN-160 SharcFIN features a set of bus interfaces and peripherals for the ADSP-21160 SHARC DSPs. It integrates a full-featured SDRAM controller, a full 64-bit, 66 MHz master PCI interface, a peripheral bus that interfaces the DSPs to peripherals such as Flash memory, and an extensive flag and interrupt multiplexer.

Block Diagram

 

Technical Specifications
  • 64/66 MHz PCI rev. 2.2 compliant interface (528 burst) SDRAM controller on SHARC bus; supports up to 512 MB
  • SDRAM mapped into PCI memory space
  • Programmable interrupt multiplexer: 10 inputs, 7 outputs (supports hardware interrupts in both directions)
  • All ADSP-21160 IOP registers and internal SRAM are mapped to PCI memory space
  • Supports host- and FLASH-based booting of ADSP-21160s 8-bit, 20 MHz peripheral bus
  • Downward compatible with 32-bit, 33 MHz interfaces

Development Tools

Developing a signal processing application requires a software tool suite that is tightly integrated, takes full advantage of the capabilities of the FPGA and DSP, and covers the entire product development cycle – from code development, to debugging, to final deployment. To provide such a software suite for its FPGA and DSP boards, BittWare has combined its years of experience within signal processing design with the expertise of many other industry leaders. The result is a set of software tools that shortens designers’ learning curve while increasing their productivity, allowing them to reduce development costs and shorten their time to market.

BittWare offers four types of development tools:

The diagram below is an overview of BittWare's development tools:

Systems and Services

We offer custom board designs as well as system integration services. Our dedicated team is available to work with you to build a board to your exact specifications, modify one of our existing COTS designs, or integrate one of our boards into a system for you.